// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Tracing implementation internals
#include "verilated_vcd_c.h"
#include "Vtop__Syms.h"


//======================

void Vtop::trace(VerilatedVcdC* tfp, int, int) {
    tfp->spTrace()->addInitCb(&traceInit, __VlSymsp);
    traceRegister(tfp->spTrace());
}

void Vtop::traceInit(void* userp, VerilatedVcd* tracep, uint32_t code) {
    // Callback from tracep->open()
    Vtop__Syms* __restrict vlSymsp = static_cast<Vtop__Syms*>(userp);
    if (!vlSymsp->_vm_contextp__->calcUnusedSigs()) {
        VL_FATAL_MT(__FILE__, __LINE__, __FILE__,
                        "Turning on wave traces requires Verilated::traceEverOn(true) call before time 0.");
    }
    vlSymsp->__Vm_baseCode = code;
    tracep->module(vlSymsp->name());
    tracep->scopeEscape(' ');
    Vtop::traceInitTop(vlSymsp, tracep);
    tracep->scopeEscape('.');
}

//======================


void Vtop::traceInitTop(void* userp, VerilatedVcd* tracep) {
    Vtop__Syms* __restrict vlSymsp = static_cast<Vtop__Syms*>(userp);
    Vtop* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    // Body
    {
        vlTOPp->traceInitSub0(userp, tracep);
    }
}

void Vtop::traceInitSub0(void* userp, VerilatedVcd* tracep) {
    Vtop__Syms* __restrict vlSymsp = static_cast<Vtop__Syms*>(userp);
    Vtop* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    const int c = vlSymsp->__Vm_baseCode;
    if (false && tracep && c) {}  // Prevent unused
    // Body
    {
        tracep->declBit(c+28,"clock", false,-1);
        tracep->declBit(c+29,"reset", false,-1);
        tracep->declBit(c+30,"io_out_Data_in", false,-1);
        tracep->declBit(c+31,"io_out_Ena_in", false,-1);
        tracep->declBit(c+32,"io_out_Clk_in", false,-1);
        tracep->declBit(c+33,"io_out_Ena_out", false,-1);
        tracep->declBit(c+34,"io_out_Clk_out", false,-1);
        tracep->declBit(c+35,"io_out_Clk", false,-1);
        tracep->declBit(c+28,"top clock", false,-1);
        tracep->declBit(c+29,"top reset", false,-1);
        tracep->declBit(c+30,"top io_out_Data_in", false,-1);
        tracep->declBit(c+31,"top io_out_Ena_in", false,-1);
        tracep->declBit(c+32,"top io_out_Clk_in", false,-1);
        tracep->declBit(c+33,"top io_out_Ena_out", false,-1);
        tracep->declBit(c+34,"top io_out_Clk_out", false,-1);
        tracep->declBit(c+35,"top io_out_Clk", false,-1);
        tracep->declBit(c+36,"top M_Core_clock", false,-1);
        tracep->declBit(c+29,"top M_Core_reset", false,-1);
        tracep->declBit(c+1,"top M_Core_io_out_Data_in", false,-1);
        tracep->declBit(c+2,"top M_Core_io_out_Ena_in", false,-1);
        tracep->declBit(c+3,"top M_Core_io_out_Clk_in", false,-1);
        tracep->declBit(c+4,"top M_Core_io_out_Ena_out", false,-1);
        tracep->declBit(c+5,"top M_Core_io_out_Clk_out", false,-1);
        tracep->declBit(c+6,"top M_Core_io_out_Clk", false,-1);
        tracep->declBit(c+28,"top M_Clk_Divider_clk", false,-1);
        tracep->declBit(c+29,"top M_Clk_Divider_rst_p", false,-1);
        tracep->declBit(c+36,"top M_Clk_Divider_clk_div", false,-1);
        tracep->declBit(c+36,"top M_Core clock", false,-1);
        tracep->declBit(c+29,"top M_Core reset", false,-1);
        tracep->declBit(c+1,"top M_Core io_out_Data_in", false,-1);
        tracep->declBit(c+2,"top M_Core io_out_Ena_in", false,-1);
        tracep->declBit(c+3,"top M_Core io_out_Clk_in", false,-1);
        tracep->declBit(c+4,"top M_Core io_out_Ena_out", false,-1);
        tracep->declBit(c+5,"top M_Core io_out_Clk_out", false,-1);
        tracep->declBit(c+6,"top M_Core io_out_Clk", false,-1);
        tracep->declBit(c+36,"top M_Core M_PUF_Core_clock", false,-1);
        tracep->declBit(c+29,"top M_Core M_PUF_Core_reset", false,-1);
        tracep->declBit(c+15,"top M_Core M_PUF_Core_io_out_Data_in", false,-1);
        tracep->declBit(c+24,"top M_Core M_PUF_Core_io_out_Ena_in", false,-1);
        tracep->declBit(c+25,"top M_Core M_PUF_Core_io_out_Clk_in", false,-1);
        tracep->declBit(c+7,"top M_Core M_PUF_Core_io_out_Ena_out", false,-1);
        tracep->declBit(c+26,"top M_Core M_PUF_Core_io_out_Clk_out", false,-1);
        tracep->declBit(c+8,"top M_Core M_PUF_Core_io_clk_Clk", false,-1);
        tracep->declBit(c+36,"top M_Core the_clock_M_Clk_Divider_clock", false,-1);
        tracep->declBit(c+29,"top M_Core the_clock_M_Clk_Divider_reset", false,-1);
        tracep->declBit(c+9,"top M_Core the_clock_M_Clk_Divider_io_clk_out", false,-1);
        tracep->declBit(c+8,"top M_Core the_clock_reverse", false,-1);
        tracep->declBit(c+2,"top M_Core the_ena_in", false,-1);
        tracep->declBit(c+3,"top M_Core the_clk_in", false,-1);
        tracep->declBit(c+1,"top M_Core io_out_Data_in_REG", false,-1);
        tracep->declBit(c+4,"top M_Core io_out_Ena_out_REG", false,-1);
        tracep->declBit(c+5,"top M_Core io_out_Clk_out_REG", false,-1);
        tracep->declBit(c+10,"top M_Core io_out_Clk_REG", false,-1);
        tracep->declBit(c+11,"top M_Core io_out_Clk_REG_1", false,-1);
        tracep->declBit(c+12,"top M_Core io_out_Clk_REG_2", false,-1);
        tracep->declBit(c+6,"top M_Core io_out_Clk_REG_3", false,-1);
        tracep->declBit(c+36,"top M_Core M_PUF_Core clock", false,-1);
        tracep->declBit(c+29,"top M_Core M_PUF_Core reset", false,-1);
        tracep->declBit(c+15,"top M_Core M_PUF_Core io_out_Data_in", false,-1);
        tracep->declBit(c+24,"top M_Core M_PUF_Core io_out_Ena_in", false,-1);
        tracep->declBit(c+25,"top M_Core M_PUF_Core io_out_Clk_in", false,-1);
        tracep->declBit(c+7,"top M_Core M_PUF_Core io_out_Ena_out", false,-1);
        tracep->declBit(c+26,"top M_Core M_PUF_Core io_out_Clk_out", false,-1);
        tracep->declBit(c+8,"top M_Core M_PUF_Core io_clk_Clk", false,-1);
        tracep->declBit(c+13,"top M_Core M_PUF_Core M_Count_Clk_clock", false,-1);
        tracep->declBit(c+29,"top M_Core M_PUF_Core M_Count_Clk_reset", false,-1);
        tracep->declBit(c+15,"top M_Core M_PUF_Core M_Count_Clk_io_Data_in", false,-1);
        tracep->declBus(c+16,"top M_Core M_PUF_Core M_Count_Clk_io_count_clk_in", false,-1, 7,0);
        tracep->declBus(c+17,"top M_Core M_PUF_Core M_Count_Clk_io_count_clk_delay", false,-1, 7,0);
        tracep->declBus(c+18,"top M_Core M_PUF_Core M_Count_Clk_io_count_clk_enable", false,-1, 7,0);
        tracep->declBus(c+19,"top M_Core M_PUF_Core M_Count_Clk_io_count_clk_out", false,-1, 7,0);
        tracep->declArray(c+38,"top M_Core M_PUF_Core M_Count_Clk_io_Data", false,-1, 209,0);
        tracep->declBus(c+27,"top M_Core M_PUF_Core M_Count_Clk_io_stateReg", false,-1, 2,0);
        tracep->declBit(c+14,"top M_Core M_PUF_Core the_ena_out", false,-1);
        tracep->declBit(c+7,"top M_Core M_PUF_Core io_out_Ena_out_REG", false,-1);
        tracep->declBus(c+16,"top M_Core M_PUF_Core count_clk_in", false,-1, 7,0);
        tracep->declBit(c+20,"top M_Core M_PUF_Core trigger_delay", false,-1);
        tracep->declBus(c+17,"top M_Core M_PUF_Core count_clk_delay", false,-1, 7,0);
        tracep->declBit(c+21,"top M_Core M_PUF_Core trigger_enable", false,-1);
        tracep->declBus(c+18,"top M_Core M_PUF_Core count_clk_enable", false,-1, 7,0);
        tracep->declBit(c+22,"top M_Core M_PUF_Core trigger_output", false,-1);
        tracep->declBus(c+19,"top M_Core M_PUF_Core count_clk_out", false,-1, 7,0);
        tracep->declBit(c+23,"top M_Core M_PUF_Core trigger_idle", false,-1);
        tracep->declBus(c+27,"top M_Core M_PUF_Core stateReg", false,-1, 2,0);
        tracep->declBit(c+13,"top M_Core M_PUF_Core M_Count_Clk clock", false,-1);
        tracep->declBit(c+29,"top M_Core M_PUF_Core M_Count_Clk reset", false,-1);
        tracep->declBit(c+15,"top M_Core M_PUF_Core M_Count_Clk io_Data_in", false,-1);
        tracep->declBus(c+16,"top M_Core M_PUF_Core M_Count_Clk io_count_clk_in", false,-1, 7,0);
        tracep->declBus(c+17,"top M_Core M_PUF_Core M_Count_Clk io_count_clk_delay", false,-1, 7,0);
        tracep->declBus(c+18,"top M_Core M_PUF_Core M_Count_Clk io_count_clk_enable", false,-1, 7,0);
        tracep->declBus(c+19,"top M_Core M_PUF_Core M_Count_Clk io_count_clk_out", false,-1, 7,0);
        tracep->declArray(c+38,"top M_Core M_PUF_Core M_Count_Clk io_Data", false,-1, 209,0);
        tracep->declBus(c+27,"top M_Core M_PUF_Core M_Count_Clk io_stateReg", false,-1, 2,0);
        tracep->declBus(c+16,"top M_Core M_PUF_Core M_Count_Clk count_clk_in", false,-1, 7,0);
        tracep->declBus(c+17,"top M_Core M_PUF_Core M_Count_Clk count_clk_delay", false,-1, 7,0);
        tracep->declBus(c+18,"top M_Core M_PUF_Core M_Count_Clk count_clk_enable", false,-1, 7,0);
        tracep->declBus(c+19,"top M_Core M_PUF_Core M_Count_Clk count_clk_out", false,-1, 7,0);
        tracep->declBit(c+36,"top M_Core the_clock_M_Clk_Divider clock", false,-1);
        tracep->declBit(c+29,"top M_Core the_clock_M_Clk_Divider reset", false,-1);
        tracep->declBit(c+9,"top M_Core the_clock_M_Clk_Divider io_clk_out", false,-1);
        tracep->declBit(c+9,"top M_Core the_clock_M_Clk_Divider the_clk", false,-1);
        tracep->declBus(c+45,"top M_Clk_Divider NUM_DIV", false,-1, 31,0);
        tracep->declBus(c+46,"top M_Clk_Divider CNT_LEN", false,-1, 31,0);
        tracep->declBit(c+28,"top M_Clk_Divider clk", false,-1);
        tracep->declBit(c+29,"top M_Clk_Divider rst_p", false,-1);
        tracep->declBit(c+36,"top M_Clk_Divider clk_div", false,-1);
        tracep->declBus(c+37,"top M_Clk_Divider cnt", false,-1, 7,0);
    }
}

void Vtop::traceRegister(VerilatedVcd* tracep) {
    // Body
    {
        tracep->addFullCb(&traceFullTop0, __VlSymsp);
        tracep->addChgCb(&traceChgTop0, __VlSymsp);
        tracep->addCleanupCb(&traceCleanup, __VlSymsp);
    }
}

void Vtop::traceFullTop0(void* userp, VerilatedVcd* tracep) {
    Vtop__Syms* __restrict vlSymsp = static_cast<Vtop__Syms*>(userp);
    Vtop* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    // Body
    {
        vlTOPp->traceFullSub0(userp, tracep);
    }
}

void Vtop::traceFullSub0(void* userp, VerilatedVcd* tracep) {
    Vtop__Syms* __restrict vlSymsp = static_cast<Vtop__Syms*>(userp);
    Vtop* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    vluint32_t* const oldp = tracep->oldp(vlSymsp->__Vm_baseCode);
    if (false && oldp) {}  // Prevent unused
    // Variables
    VlWide<7>/*223:0*/ __Vtemp7;
    VlWide<7>/*223:0*/ __Vtemp8;
    VlWide<7>/*223:0*/ __Vtemp10;
    // Body
    {
        tracep->fullBit(oldp+1,(vlTOPp->top__DOT__M_Core__DOT__io_out_Data_in_REG));
        tracep->fullBit(oldp+2,(vlTOPp->top__DOT__M_Core__DOT__the_ena_in));
        tracep->fullBit(oldp+3,(vlTOPp->top__DOT__M_Core__DOT__the_clk_in));
        tracep->fullBit(oldp+4,(vlTOPp->top__DOT__M_Core__DOT__io_out_Ena_out_REG));
        tracep->fullBit(oldp+5,(vlTOPp->top__DOT__M_Core__DOT__io_out_Clk_out_REG));
        tracep->fullBit(oldp+6,(vlTOPp->top__DOT__M_Core__DOT__io_out_Clk_REG_3));
        tracep->fullBit(oldp+7,(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__io_out_Ena_out_REG));
        tracep->fullBit(oldp+8,((1U & (~ (IData)(vlTOPp->top__DOT__M_Core__DOT__the_clock_M_Clk_Divider__DOT__the_clk)))));
        tracep->fullBit(oldp+9,(vlTOPp->top__DOT__M_Core__DOT__the_clock_M_Clk_Divider__DOT__the_clk));
        tracep->fullBit(oldp+10,(vlTOPp->top__DOT__M_Core__DOT__io_out_Clk_REG));
        tracep->fullBit(oldp+11,(vlTOPp->top__DOT__M_Core__DOT__io_out_Clk_REG_1));
        tracep->fullBit(oldp+12,(vlTOPp->top__DOT__M_Core__DOT__io_out_Clk_REG_2));
        tracep->fullBit(oldp+13,(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk_clock));
        tracep->fullBit(oldp+14,(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__the_ena_out));
        __Vtemp7[0U] = 0xaaaaaaaaU;
        __Vtemp7[1U] = 0xaaaaaaaaU;
        __Vtemp7[2U] = 0xaaaaaaaaU;
        __Vtemp7[3U] = 0xaaaaaaaaU;
        __Vtemp7[4U] = 0xaaaaaaaaU;
        __Vtemp7[5U] = 0xaaaaaaaaU;
        __Vtemp7[6U] = 0x2aaaaU;
        VL_SHIFTR_WWI(210,210,8, __Vtemp8, __Vtemp7, (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk__DOT__count_clk_in));
        tracep->fullBit(oldp+15,((1U & __Vtemp8[0U])));
        tracep->fullCData(oldp+16,(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk__DOT__count_clk_in),8);
        tracep->fullCData(oldp+17,(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk__DOT__count_clk_delay),8);
        tracep->fullCData(oldp+18,(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk__DOT__count_clk_enable),8);
        tracep->fullCData(oldp+19,(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk__DOT__count_clk_out),8);
        tracep->fullBit(oldp+20,((0xd2U == (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk__DOT__count_clk_in))));
        tracep->fullBit(oldp+21,((4U == (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk__DOT__count_clk_delay))));
        tracep->fullBit(oldp+22,((2U == (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk__DOT__count_clk_enable))));
        tracep->fullBit(oldp+23,((0x7eU == (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__M_Count_Clk__DOT__count_clk_out))));
        tracep->fullBit(oldp+24,(((1U != (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg)) 
                                  & ((2U == (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg)) 
                                     | (3U == (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg))))));
        tracep->fullBit(oldp+25,(((1U == (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg)) 
                                  | ((2U != (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg)) 
                                     & ((3U != (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg)) 
                                        & (4U == (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg)))))));
        tracep->fullBit(oldp+26,(((1U != (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg)) 
                                  & ((2U != (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg)) 
                                     & (IData)(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT___GEN_3)))));
        tracep->fullCData(oldp+27,(vlTOPp->top__DOT__M_Core__DOT__M_PUF_Core__DOT__stateReg),3);
        tracep->fullBit(oldp+28,(vlTOPp->clock));
        tracep->fullBit(oldp+29,(vlTOPp->reset));
        tracep->fullBit(oldp+30,(vlTOPp->io_out_Data_in));
        tracep->fullBit(oldp+31,(vlTOPp->io_out_Ena_in));
        tracep->fullBit(oldp+32,(vlTOPp->io_out_Clk_in));
        tracep->fullBit(oldp+33,(vlTOPp->io_out_Ena_out));
        tracep->fullBit(oldp+34,(vlTOPp->io_out_Clk_out));
        tracep->fullBit(oldp+35,(vlTOPp->io_out_Clk));
        tracep->fullBit(oldp+36,(vlTOPp->top__DOT__M_Clk_Divider_clk_div));
        tracep->fullCData(oldp+37,(vlTOPp->top__DOT__M_Clk_Divider__DOT__cnt),8);
        __Vtemp10[0U] = 0xaaaaaaaaU;
        __Vtemp10[1U] = 0xaaaaaaaaU;
        __Vtemp10[2U] = 0xaaaaaaaaU;
        __Vtemp10[3U] = 0xaaaaaaaaU;
        __Vtemp10[4U] = 0xaaaaaaaaU;
        __Vtemp10[5U] = 0xaaaaaaaaU;
        __Vtemp10[6U] = 0x2aaaaU;
        tracep->fullWData(oldp+38,(__Vtemp10),210);
        tracep->fullIData(oldp+45,(0x64U),32);
        tracep->fullIData(oldp+46,(8U),32);
    }
}
